1. Field of the Invention
The present invention relates to a semiconductor device which provides an internal circuit having a high breakdown voltage transistor and electrostatic protection elements for protecting the internal circuit.
2. Description of the Related Art
Conventionally, there is a semiconductor device which provides an internal circuit having a high breakdown voltage transistor and electrostatic protection elements for protecting the internal circuit.
FIG. 3 is a diagram showing an equivalent circuit of a conventional semiconductor device 100.
As shown in FIG. 3, the conventional semiconductor device 100 provides an input/output terminal 101, a power source terminal 102, a ground terminal 103, a resistor 104, an internal circuit 106, and electrostatic protection elements 107 and 108.
The internal circuit 106 includes a high breakdown voltage transistor 109. The internal circuit 106 is electrically connected to the input/output terminal 101 via the resistor 104. In addition, the internal circuit 106 is electrically connected to the power source terminal 102 and the ground terminal 103.
The electrostatic protection element 107 is electrically connected to the input/output terminal 101 and the ground terminal 103 by being disposed inbetween. The electrostatic protection element 107 is a MOSFET type electrostatic protection element. The electrostatic protection element 107 has a breakdown voltage value which is almost equal to a breakdown voltage value of the high breakdown voltage transistor 109. When a surge voltage (abnormal voltage) such as static electricity is input to the input/output terminal 101, the electrostatic protection element 107 protects the internal circuit 106 from being damaged by a surge current caused by the surge voltage.
The electrostatic protection element 108 is electrically connected to the power source terminal 102 and the ground terminal 103 by being disposed inbetween. The electrostatic protection element 108 is a MOSFET type electrostatic protection element. The electrostatic protection element 108 has a breakdown voltage value which is almost equal to the value breakdown voltage of the high breakdown voltage transistor 109. The electrostatic protection element 108 has a structure similar to the structure of the electrostatic protection element 107. The electrostatic protection element 108 protects the line between the power source terminal 102 and the ground terminal 103 from being damaged by a surge voltage.
FIG. 4 is a cut-away side view of the semiconductor device 100 shown in FIG. 3 at a part where the electrostatic protection element 107 is shown.
As shown in FIG. 4, the electrostatic protection element 107 is formed on a P type semiconductor substrate 111. The electrostatic protection element 107 provides low concentration N type diffusion layers 113-1 and 113-2, source regions 114, a drain region 115, back gate power supply regions 116, a LOCOS oxide film 118, gate oxide films 119, gates 121, an insulation film 122, and electrodes 124 through 126.
The plural low concentration N type diffusion layers 113-1 and 113-2 are formed on the P type semiconductor substrate 111. The impurity concentration of the low concentration N type diffusion layers 113-1 and 113-2 is lower than that of the source regions 114 and the drain region 115.
The source regions 114 are formed on the low concentration N type diffusion layer 113-1. The drain region 115 is formed on the low concentration N type diffusion layer 113-2. The drain region 115 is formed between the source regions 114. The back gate power supply regions 116 are formed adjacent to the corresponding source regions 114 on the P type semiconductor substrate 111.
The LOCOS oxide film 118 is formed on the P type semiconductor substrate 111, the source regions 114, the drain region 115, and the back gate power supply regions 116. The gate oxide film 119 is formed on the P type semiconductor substrate 111. The gate 121 is formed on the gate oxide film 119 and the LOCOS oxide film 118 adjacent to the gate oxide film 119.
The insulation film 122 is formed to cover the LOCOS oxide film 118 and the gates 121. The insulation film 122 provides holes 122A for exposing the source regions 114 and the back gate power supply regions 116, holes 122B for exposing the gates 121, and a hole 122C for exposing the drain region 115.
The electrodes 124 are formed in the corresponding holes 122A. One end of each of the electrodes 124 is connected to the corresponding source region 114 and the back gate power supply region 116 and the other end of each of the electrodes 124 is connected to the ground terminal 103. The electrodes 125 are formed in the corresponding holes 122B. One end of each of the electrodes 125 is connected to the corresponding gate 121 and the other end of each of the electrodes 125 is connected to the ground terminal 103. The electrode 126 is formed in the hole 122C. One end of the electrode 126 is connected to the drain region 115 and the other end is connected to the input/output terminal 101 (for example, refer to Patent Document 1).
[Patent Document 1] Japanese Laid-Open Patent Application No. 9-116100
However, in the electrostatic protection elements 107 and 108, in order to prevent destruction of a PN junction E which is formed at a boundary between the low concentration N type diffusion layer 113-2 and the P type semiconductor substrate 111, the area of the PN junction E must be large. With this, the sizes of the electrostatic protection elements 107 and 108 become large, and the semiconductor device 100 cannot be small.